For high speed serial Input-Output (I/O)s, e.g., Universal Serial Bus (USB) 3, to be able to deal with channels with over 20 dB of loss at Nyquist frequency, Decision Feedback Equalization (DFE) is added to the I/O receivers to correct for Inter-Symbol Interference (ISI) on analog input signals received by the I/Os. DFE is commonly implemented using a summer in a data path which adds offset to the analog input signal as a function of ‘n’ previous samples. DFE has the disadvantage of creating a speed path from the most recently sampled bit d[n] to influence the bit immediately following y[n+1], where y[n+1] is generated by the summer of DFE.
An alternative to DFE is loop-unrolled DFE (uDFE), where multiple samples are taken at two or more applied offsets and the decision on which value to use is postponed until later in the pipeline. uDFE eliminates the speed path observed by traditional DFE because knowing what the last data sample resolved to before sampling the next sample is no longer needed. However, uDFE is very impractical to implement for much over 1 bit feedback since 2n samplers are required for ‘n’ bits (also called ‘n’ taps) of feedback. 4-tap uDFE, for example, may require 16 samplers to implement in a loop-unrolled fashion which dramatically increases the power and area of the I/O design. Another disadvantage of DFE and uDFE is that they do not address pre-cursor ISI, which is a major source of error.
Overall as data rates increase, increasingly more equalization is required to recover the data. This comes at a power and area cost that conflicts with the aggressive power and cost budgets for handheld SoC (System-on-Chip) devices.